Год выпуска: 2012 Автор: Sayed Alireza Sadrossadat Издательство: LAP Lambert Academic Publishing Страниц: 80 ISBN: 9783848420247
Описание
Achieving high performance is one of the most difficult challenges in designing digital circuits. Flip-flops and adders are key blocks in most digital systems and must therefore be designed to yield highest performance. In this book, a new high performance serial adder is developed while power consumption is attained. Also, a statistical framework for the design of flip-flops is introduced that ensures that such sequential circuits meet timing yield under performance criteria. Firstly, a high performance serial adder is developed based on the idea of having a constant delay for the addition of two operands. While conventional adders exhibit logarithmic delay. Also the proposed adder exhibits less area and power consumption. Secondly, a statistical framework for the design of flip-flops under process variations is presented in order to maximize their timing yield. In nanometer CMOS technologies, process variations significantly impact the timing performance of sequential circuits which...
