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Design & Performance Evaluation of Arithmetic Units in DSM



Год выпуска: 2012
Автор: Hiral Shah
Издательство: LAP Lambert Academic Publishing
Страниц: 88
ISBN: 9783659216398
Описание
The core of every microprocessor, digital signal processor and data processing application-specific integrated circuit (ASIC) is its data path. It is often the crucial circuit component die area, power dissipation, and especially operation speed is of concern. At the heart of data-path and addressing units in turn are arithmetic units, such as comparators, adders, and multipliers. It is also a very critical one if implemented in hardware because it involves an expensive carry-propagation step, the evaluation time of which is dependent on the operand word length. The efficient implementation is a key problem in VLSI design. As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior studies have shown that chip operating frequency and leakage power can have large variations due to fluctuations in transistor gate length and sub-threshold voltage. This work presents the...


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Андрей (Санкт-Петербург)
Здравствуйте Ирина! Спасибо за раздаточный материал. Буду готовиться к защите. Вам так же всего наилучшего !!!